HamGeek M2SDR Software Defined Radio M.2 XC7A200 RF Transceiver Module GPSDO 40M Clock Output

Interface Definition:
1: TXA, the transmission port of channel A.
2: RXA, the receiving port of channel A.
3: RXB, the receiving port of channel B.
4: TXB, the transmission port of channel B.
5: PPS synchronization signal input.
6: PCIE for M.2 interface.
7: 40M clock output, with peak to peak output of approximately 300mV.
8: Connected to an external active clock, UHD defaults to a frequency of 10MHz.
9: Connect GPS active antenna to achieve GPSDO function.

Update Log:
- 2026/1/13: the XC7A200 FPGA chip was mounted and underwent hardware and wireless testing.

- 2026/1/14: UHD and drivers were reorganized, and most of the underlying code was packaged into a static link library. Debugging information was removed and the release version was prepared. UHD needs to be compiled and installed from the source code. Now the board supports UHD version numbers from 4.2 to 4.9.
- We provide the .KO files for underlying linuxdriver, which currently support for Ubuntu 18.04, 20.04, 22.04, 24.04, 25.04. If your system for LINUX is not included, please contact us to provide us with the relevant system information. We will install the system for you in advance and send you the driver files afterwards.

- 2026/1/15: a simple adapter board was designed to enable M2 to PCIE conversion, making it convenient for users to use this SDR on regular PCIE ports.

- 2026/1/16: the function of writing FLASH was implemented, and after running, the .bin file was programmed onto the FLASH chip of the board, achieving an upgrade. Due to the continuous iteration and evolution of our software, users can keep up with our latest designs at any time with this software tool.

- 2026/1/17: Organized the underlying drivers and UHD drivers, and removed some redundant debugging information.

- 2026/1/22: Due to the inconvenience of installing the PCIE driver previously, we have directly opened sourced the PCIE driver, so that users can compile the PCIE driver from the source code on their own platform for LINUX.

- 2026/1/25: Implemented NOOS and HDL projects for ADI, which are independent of the B210 mode and require updating FLASH. Provide an interface for data acquisition, allowing users to set the center frequency sampling rate and gain parameters of AD9361 using C language on platform for LINUX. The collected data can be saved locally as a file. Now realize the ability to save 32K samples of collected samples. This mode is temporarily referred to as NOOS mode. NOOS is what officially refers to as NO-OS, operating system free mode. Please note that the NOOS software system is still under development and has not been released yet.

- 2026/1/26: Due to the use of different bit stream configurations for B210 and NOOS modes, FLASH needs to be wrote when switching. We have updated the FLASH burning program for 2026/1/16 to be compatible with both modes.

- 2026/1/27: a program for Python was developed based on the data collected by NOOS, which can display the collected IQ data in both frequency and time domains.

- 2026/2/7: the processor driver adapted to ARM architecture was released today. For ARM's support for mapping user memory at the kernel driver level is different from X86. I have added conditional compilation instructions for automatic adaptation in the kernel driver and UHD code. Now ORANGEPI has been compiled and approved. For Raspberry Pi and RK3588's NANOPC are both ARM based systems for LINUX and have been directly adapted successfully. The uploaded image is a test screenshot of successfully driving and running UHD_URP_PRO on ORANGEPI.

- 2026/2/25: The PCIE to M2 adapter board experiment for M2SDR was successful. Not currently available for sale. In fact, it is recommended to use the native PCIE version of this link on a PC, which is compatible with all the functions of the M2 interface, as well as RF amplification and TDD support.

- 2026/2/27: The M2 interface used by the Raspberry Pi B5 is 4X, but in reality it only has 1X. We have modified the firmware to provide 1X mode as an option, but it has not been tested on the board yet.

Support for official features of B210:
1. Supports 10M external synchronous clock input.
2. Support external PPS synchronous input.
3. Equipped with onboard GPSDO, it can calibrate the clock, obtain time information, and achieve foreign synchronization (this function can also be removed by selecting the firmware).
4. Please note that there is still a small bug where there is an error message when the TX transmission rate is less than 1.9M. TX above 1.9M and RX across the entire range are fully compatible with B210, and we are working on resolving this issue.
5. Supports B210 mode and NOOS mode, users can control the collection and transmission of data of AD9361 based on UHD or directly control it using C.

Package Included:
- 1 x M2SDR Module

Here are some screenshots of actual testing:

The following figure shows a screen shot of the mount driver of M2SDR and running the uhd_usrp-probe command:

The following figure shows the actual test run of receiving 56M data by running the benchpack_rate command:

The following figure shows the frequency spectrum of M2SDR running the GNU-Radio RF transceiver loop test without any antenna connected:

The screenshot below shows the operation of SRSRAN: